1. Field of the Invention
This invention pertains generally to the field of ATM switches having memories, and, in particular to the power supply of an ATM memory chip.
2. Description of the Prior Art
Unlike conventional memories, ATM memories are organized in arrays with very wide data busses. The data buss of an ATM memory is typically 424-480 bits, compared to eight bits for a conventional memory. This creates a potential transient problem in an ATM memory that is caused by writing 480 bits at the same time.
FIG. 1 shows a conventional memory arrangement using horizontal power busses. During a write operation, 480 bits are written at the same time. Consequently, the ground line for that row has to carry the transient current of 480 bits. The transient noise voltage at any column is the sum of the IR drops between that column and the ground point. The transient noise voltage reaches a maximum at column 1. This voltage (V.sub.1) is: EQU V.sub.1 =IR+2IR+3IR+. . . nIR (1) EQU V.sub.1 =(1+2+3 . . . n)IR (2)
where n=480
Equation (2) is an arithmetic series and can be written in closed form. From "Reference Data for Radio Engineers," Fifth Edition on pp. 44-45 we get: ##EQU1## for a=0 and d=1, equation (3) simplifies to: ##EQU2## for n&gt;1, equation 4 simplifies to: ##EQU3## substituting equations 4 and 5 into equation 2 we get: EQU V.sub.1 =(1/2n.sup.2)IR (6
For n=480, I=0.2 ma and R=0.1.OMEGA. we get: EQU V.sub.1 =1/2(480).sup.2 (0.2.times.10.sup.-3))(0.1)=2.304 volt(7)
Consequently, the transient noise voltage at the farthest column from the ground, is 2.304 volt which is unacceptably large. This transient noise voltage can be reduced by providing an additional ground connection on the right side. However, the resulting transient noise would still be too large and unworkable.
The principal object of the present invention is to provide an ATM chip power supply which drastically reduces voltage transients due to simultaneous switching of wide data busses.